Difference between revisions of "RealQ16s:Provisional instruction listing/Opcode table/1 byte instructions"

Revision as of 22:18, 12 February 2016

Range		Operation	bits			Distinct opcodes	Comment	Caveats
0000	0000	`NOP`	0000	0000		x1	Does nothing
0000	0001	(unused)	0000	0001		(x15 opcodes)
...		...	...
0000	1111	(Unused)	0000	1111
0001	0000	`MOV r1,r2`	0001	r1	r2	x12	Store r1 in r2, treating them both as 16 bit registers	r1 and r2 must be different
...		(Unused)	0001	0000		x1
		(Unused)	0001	0101		x1
		(Unused)	0001	1010		x1
0001	1111	(Unused)	0001	1111		x1
0010	0000	`PUSH r1`	0010	00	r1	x4	Push the 16 bit register r1
0010	0100	`POP r1`	0010	01	r1	x4	Pop the 16 bit register r1
0010	1000	`MOV b1,r1L`	0010	10	r1	x1024 (x4)	16 bit instruction `0010 10r1 vvvv vvvv` - move byte b1 given by v into low byte of register r1
0010	1100	`MOV b1,r1H`	0010	11	r1	x1024 (x4)	16 bit instruction `0010 11r1 vvvv vvvv` - move byte b1 given by v into high byte of register r1
0011	0000	`MOVACO b1,r1L`	0011	00	r1	x1024 (x4)11	16 bit instruction `0010 11r1 vvvv vvvv` - move byte b1 given by v into low byte of register r1, then clear high byte of register r1.		0011	0100

@@ Line 117: / Line 117: @@
 | colspan="4" | 0011
 | colspan="4" | 0000
+| {{Provisional opcode|16s|MOVACO b1,r1L}}
+| colspan="4" | 0011
+| colspan="2" | 00
+| colspan="2" | r1
+| style="text-align:right" | x1024 (x4)11
+| '''''16 bit'' instruction''' <code>0010 11r1 vvvv vvvv</code> - move byte ''b1'' given by ''v'' into low byte of register ''r1'', then clear high byte of register ''r1''.
+|
+| colspan="4" | 0011
+| colspan="4" | 0100
 |}